ZX81/TS1000 Tips

See all articles from SINCUS v8 n2

17. In the TS1000 Timex Manual there are the following mnemonic errors :

a) From 00 hex. to 07 hex. — after CB the manual has ric (b to a). It should be rlc (b to a).

b) At 6B hex. — after ED the manual has ld de, (NN). It should be ld hl, (NN).

18. The Instruction Codes not included in the Timex Manual are the DD Codes and the FD Codes. The DD Codes pertain to the IX Register, while the FD Codes pertain to the IY register. These codes are 2, 3 or 4 bytes long and are as follows:

hex code  mnemonic        !  hex code  mnemonic
DD09      ADD IX, BC      !  FD09      ADD IY, BC
DD19      ADD IX, DE      !  FD19      ADD IY, DE
DD21nnmm  LD IX, mn       !  FD21nnmm  LD IY, mn
DD22qqpp  LD (pq), IX     !  FD22qqpp  LD(pq), IY
DD23      INC IX          !  FD23      INC IY
DD29      ADD IX, IX      !  FD29      ADD IT, IY
DD2Aqqpp  LD IX, (pq)     !  FD2Aqqpp  LD IY, (pq)
DD2B      DEC IX          !  FD2B      DEC IY
DD34dd    INC (IX+d)      !  FD34dd    INC (IY+d)
DD35dd    DEC (IX+d)      !  FD35dd    DEC (IY+d)
DD36ddnn  LD (IX+d), n    !  FD36ddnn  LD (IY+d), n
DD39      ADD IX, SP      !  FD39      ADD IY, SP
DD46dd    LD B, (IX+d)    !  FD46dd    LD B, (IY+d)
DD4Edd    LD C, (IX+d)    !  FD4Edd    LD C, (IY+d)
DD56dd    LD D, (IX+d)    !  FD56dd    LD D, (IY+d)
DD5Edd    LD E, (IX+d)    !  FD5Edd    LD E, (IY+d)
DD66dd    LD H, (IX+d)    !  FD66dd    LD H, (IY+d)
DD6Edd    LD L, (IX+d)    !  FD6Edd    LD L, (IY+d)
DD70dd    LD (IX+d), B    !  FD70dd    LD (IY+d), B
DD71dd    LD (IX+d), C    !  FD71dd    LD (IY+d), C
DD72dd    LD (IX+d), D    !  FD72dd    LD (IY+d), D
DD73dd    LD (IX+d), E    !  FD73dd    LD (IY+d), E
DD74dd    LD (IX+d), H    !  FD74dd    LD (IY+d), H
DD75dd    LD (IX+d), L    !  FD75dd    LD (IY+d), L
DD77dd    LD (IX+d), A    !  FD77dd    LD (IY+d), A
DD7Edd    LD A, (IX+d)    !  FD7Edd    LD A, (IY+d)
DD86dd    ADD A, (IX+d)   !  FD86dd    ADD A, (IY+d)
DD8Edd    ADC A, (IX+d)   !  FD8Edd    ADC A, (IY+d)
DD96dd    SUB (IX+d)      !  FD96dd    SUB (IY+d)
DD9Edd    SBC (IX+d)      !  FD9Edd    SBC (IY+d)
DDA6dd    AND (IX+d)      !  FDA6dd    AND (IY+d)
DDAEdd    XOR (IX+d)      !  FDAEdd    XOR (IY+d)
DDB6dd    OR (IX+d)       !  FDB6dd    OR (IY+d)
DDBEdd    CP (IX+d)       !  FDBEdd    CP (IY+d)
DDE1      POP IX          !  FDE1      POP IY
DDE3      EX (SP), IX     !  FDE3      EX (SP), IY
DDE5      PUSH IX         !  FDE5      PUSH IY
DDE9      JP (IX)         !  FDE9      JP (IY)
DDEB      EX DE, IX       !  FDEB      EX DE, IY
DDF9      LD SP, IX       !  FDF9      LD SP, IY

These are the rest of the Bit Codes :

DDCBdd06  RLC (IX+d)      !  FDCBdd06  RLC (IY+d)
DDCBdd0E  RRC (IX+d)      !  FDCBdd0E  RRC (IY+d)
DDCBdd16  RL (IX+d)       !  FDCBdd16  RL (IY+d)
DDCBdd1E  RR (IX+d)       !  FDCBdd1E  RR (IY+d)
DDCBdd26  SLA (IX+d)      !  FDCBdd26  SLA (IY+d)
DDCBdd2E  SRA (IX+d)      !  FDCBdd2E  SRA (IY+d)
--                        !  --
DDCBdd3E  SRL (IX+d)      !  FDCBdd3E  SRL (IY+d)
DDCBdd46  BIT 0,(IX+d)    !  FDCBdd46  BIT 0,(IY+d)
DDCBdd4E  BIT 1, (IX+d)   !  FDCBdd4E  BIT 1, (IY+d)
DDCBdd56  BIT 2, (IX+d)   !  FDCBdd56  BIT 2, (IY+d)
DDCBdd5E  BIT 3, (IX+d)   !  FDCBdd5E  BIT 3, (IY+d)
DDCBdd66  BIT 4, (IX+d)   !  FDCBdd66  BIT 4, (IY+d)
DDCBdd6E  BIT 5, (IX+d)   !  FDCBdd6E  BIT 5, (IY+d)
DDCBdd76  BIT 6, (IX+d)   !  FDCBdd76  BIT 6, (IY+d)
DDCBdd7E  BIT 7, (IX+d)   !  FDCBdd7E  BIT 7, (IY+d)
DDCBdd86  RES 0, (IX+d)   !  FDCBdd86  RES 0, (IY+d)
DDCBdd8E  RES 1, (IX+d)   !  FDCBdd8E  RES 1, (IY+d)
DDCBdd96  RES 2, (IX+d)   !  FDCBdd96  RES 2, (IY+d)
DDCBdd9E  RES 3, (IX+d)   !  FDCBdd9E  RES 3, (IY+d)
DDCBddA6  RES 4, (IX+d)   !  FDCBddA6  RES 4, (IY+d)
DDCBddAE  RES 5, (IX+d)   !  FDCBddAE  RES 5, (IY+d)
DDCBddB6  RES 6, (IX+d)   !  FDCBddB6  RES 6, (IY+d)
DDCBddBE  RES 7, (IX+d)   !  FDCBddBE  RES 7, (IY+d)
DDCBddC6  SET 0, (IX+d)   !  FDCBddC6  SET 0, (IY+d)
DDCBddCE  SET 1, (IX+d)   !  FDCBddCE  SET 1, (IY+d)
DDCBddD6  SET 2, (IX+d)   !  FDCBddD6  SET 2, (IY+d)
DDCBddDE  SET 3, (IX+d)   !  FDCBddDE  SET 3, (IY+d)
DDCBddE6  SET 4, (IX+d)   !  FDCBddE6  SET 4, (IY+d)
DDCBddEE  SET 5, (IX+d)   !  FDCBddEE  SET 5, (IY+d)
DDCBddF6  SET 6, (IX+d)   !  FDCBddF6  SET 6, (IY+d)
DDCBddFE  SET 7, (IX+d)   !  FDCBddFE  SET 7, (IY+d)

Key:

dd       The displacement byte.
d        Displacement with the Range of -129 to 127, like the e in
         the instruction JR e.
mm       The High byte.
nn       The Low byte.
pp       The High Address byte.
qq       The Low Address byte.
m,n,p & q  The value of the corresponding byte.
IX       The Index Register X.
IY       The Index Register Y.

Note:

1. In the DD & FD instructions the displacement byte is always the Third byte of the instruction.

2. These are Z-80 instructions and work with any computer based on this microprocessor.

3. The Index Registers are used by the computer’s interpeter routines, therefore, save these registers someplace before using them. Be sure to replace them before returning to BASIC.