Hot Z v1.6

Products: HOT Z
Developer(s): Ray Kingsley
Date: 198x
Type: Program
Platform(s): TS 1000

Hot Z v1.6 is a Z80 machine code utility loader and runtime environment that bootstraps itself via a single RAND USR 21340 call in line 1, with the entire payload stored as raw bytes in a REM statement at line 2. The machine code spans hundreds of bytes embedded in the REM data area and implements a complex runtime with multiple interlinked subroutines covering memory management, display routines, keyboard input handling, and interrupt-driven services. The code makes extensive use of Z80 undocumented instructions, IX/IY register operations (including FD CB bit manipulation sequences targeting IY+0x21), and direct hardware port I/O. Several self-modifying code patterns and jump tables are present, along with use of the system variables area around address 0x4000 for state storage.

Program Analysis

Program Structure

The program consists of exactly two BASIC lines:

  • 1 RAND USR 21340 — transfers control immediately to Z80 machine code at address 21340 (0x535C), which falls within the REM statement data area of line 2.
  • 2 REM ... — contains the entire machine code payload as raw bytes embedded in the REM token’s data field.

Line 2’s REM data begins with a block of null bytes, followed by the machine code proper. The entry point at 0x535C is reached directly by the RAND USR call in line 1. This is a classic technique for embedding and auto-executing machine code without any separate loader.

Entry Point and Initialization

Execution begins at 0x535C. The code immediately sets up a custom stack (LD SP, 0x40CC or similar), saves and restores alternate registers (EXX, EX AF,AF'), and installs interrupt handlers. The sequence near the top manipulates ED 73 / ED 5B pairs (i.e., LD (nn),SP and LD SP,(nn)), preserving the BASIC interpreter’s stack pointer while establishing a private one for the machine code environment.

Memory Map Usage

Address RangePurpose
0x400C–0x400FSystem variable area used for pointer storage (HL, DE pairs)
0x400E–0x400FPrimary working pointer, updated by many subroutines
0x4100–0x41FFSecondary data buffer / workspace
0x4200–0x43FFExtended data tables referenced by jump table dispatchers
0x40BA–0x40FFVarious state flags and counters (e.g., 0x40F4, 0x40F5, 0x40F6, 0x40F7)
0x53xx–0x60xxMachine code body (within REM statement)

Subroutine Architecture

The code is organized as a large collection of subroutines called via CD xx xx (CALL) sequences. A recurring main loop pattern exists at approximately 0x4952 / 0x494E, which calls a chain of handlers: input reading, display update, state machines, and cleanup, looping with 20 E9 (JR NZ, back) or C9 (RET) to return to BASIC. Key identified subroutine clusters:

  • 0x4700–0x47FF: Low-level output and character dispatch routines; CD 4D 47 is called repeatedly as a character output primitive.
  • 0x4800–0x48FF: Memory copy and block transfer routines using ED B0 (LDIR) and ED B8 (LDDR).
  • 0x4900–0x49FF: Main dispatch loop, input processing, and state machine transitions.
  • 0x4A00–0x4AFF: Prefix/opcode scanning and decode logic; contains tables of byte patterns matched against memory.
  • 0x4B00–0x4FFF: Higher-level operations including display formatting, jump table dispatch, and flag management.
  • 0x5000–0x55FF: Extended state handlers, interrupt setup/teardown, and re-entry to BASIC via C3 1D 55 (JP 0x551D).
  • 0x5600–0x60FF: Disassembler / instruction decoder — systematic opcode recognition using cascaded FE xx (CP n) / 28 (JR Z) chains covering ED, FD, DD, CB prefixes and main opcodes.

Instruction Decoder / Disassembler

A substantial portion of the code (roughly 0x5700–0x5900) implements a Z80 instruction decoder. It reads bytes from a target address (tracked via the working pointer at 0x400E), identifies instruction prefixes (DD, FD, ED, CB), and dispatches to handlers that format the mnemonic and operand output. The decoder handles all major Z80 instruction classes:

  1. Single-byte opcodes (NOP, RET, JP, CALL, etc.)
  2. CB-prefixed bit manipulation instructions
  3. ED-prefixed block and I/O instructions
  4. DD/FD-prefixed IX/IY instructions including FD CB dd op (DDCB/FDCB) forms

The decoder at 0x57F3 onward uses a long chain of CP / JR Z / JR NZ pairs to match opcode bytes and branch to formatting routines, a standard technique for compact Z80 disassemblers of this era.

IY Register Usage (FD CB Sequences)

Throughout the code, FD CB 21 xx sequences appear frequently. These are BIT, SET, and RES operations on (IY+0x21), used to maintain a set of status/mode flags in a single byte at that IY-relative address. Specific bit operations observed:

  • FD CB 21 46 — BIT 0,(IY+33): test flag bit 0
  • FD CB 21 56, 5E, 66, 6E, 76 — test bits 2–6
  • FD CB 21 86, 8E, 96, 9E, AE, C6, CE, D6, DE, EE, F6 — RES and SET operations on various bits

This pattern indicates IY is pointed at a flags/state byte structure, with individual bits controlling different behavioral modes of the runtime.

Hardware I/O

The code uses DB FE (IN A,(0xFE)) for keyboard scanning and D3 FF (OUT (0xFF),A) for border/speaker control. A sequence near 0x5390 reads keyboard rows in a loop, testing individual key bits — consistent with a full keyboard scanner driving the application’s input system.

Interrupt Handling

The code saves and restores the full register set including alternate pairs and the stack pointer using a structured prologue/epilogue pattern (visible around 0x5600 / CD 23 0F calls). This is consistent with installing a custom IM 1 or IM 2 interrupt handler that invokes application logic on each interrupt, then cleanly returns to the interrupted context.

Jump Tables

Several locations use LD HL, base; ADD HL, offset; JP (HL) patterns to dispatch through jump tables. For example, near 0x4B50 a base address is loaded, an index scaled and added, and execution jumps indirectly — a compact dispatch mechanism for multi-way branching without long chains of conditional jumps.

String / Mnemonic Data

The REM data contains embedded ASCII text strings (visible as sequences of bytes in the printable range, e.g., 37 2A 2C = “7*,”, and longer sequences spelling recognizable Z80 mnemonics and register names when XORed or offset-decoded). These are the text labels output by the disassembler and/or the application’s user interface.

BASIC Re-entry

The address 0x551D appears as a frequent jump target (C3 1D 55) throughout the code. This is the canonical “return to BASIC” exit point — the machine code restores the saved stack pointer and returns control to the BASIC interpreter cleanly, allowing the RAND USR expression to complete normally.

Notable Techniques

  • Entire program delivered as a two-line BASIC file; all logic in the REM payload.
  • Extensive use of ED 53 / ED 5B (LD (nn),SP / LD SP,(nn)) for stack context switching.
  • IY used as a base pointer to a flags byte, with FDCB bit operations as a compact flag register.
  • LDIR/LDDR block moves used for all buffer copies, minimizing code size.
  • Keyboard I/O via direct port reads rather than ROM routines, for speed and independence.
  • Self-contained Z80 disassembler with full prefix handling embedded within the runtime.

Related Products

Z80 disassembler and debugger in Hot Z.

Image Gallery

Source Code

   1 RAND USR 21340
   2 REM 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