Introduction
For several years, ZX81/TS1000 owners have dreamed of a simple bit-mapped high-resolution system for their machines. The quest began with the appearance of “software-only” high-resolution packages, which offered an improvement over the crude 44×64 block pixels, but left much to be desired regarding precision and ease of use.
Several manufacturers came out with hardware add-ons that provided true high resolution displays. Memotech‘s HRG modified the existing Sinclair “cheap video” approach, and represented the first viable alternative. Later, two different designs (John Oliger and Kolorworks) employed the Texas Instruments video display processor to add high-resolution color to these machines. All of these require substantial additional hardware, making them relatively expensive. Furthermore, software support for at least one of them (the Kolorworks) is practically non-existant.
More recently, Gregory C. Harder discovered that the TS1500 is capable of true bit-mapped displays. (See SyncWare News #3:4.) Unfortunately, we haven’t found a way of making this system work on the ZX81/TS1000. Also, the inability to set every eighth horizontal bit compromised this system’s usefulness for some applications.
Finally, almost five years after the introduction of the ZX81, a TRUE bit-mapped high resolution package has been developed, using minimal additional hardware. Would you believe that with nothing more than a CMOS memory board (such as a modified “Hunter” board) you can now have 256×192 bit-mapped displays? Believe it! WRX16 HI-RES is here! (WR=Wilf Rigter, “x16” is the degree of resolution improvement.)
WRX16 HI-RES was developed by Wilf Rigter with the ZED Team, a sub-group of the Vancouver TS User Group, consisting of Mr. Rigter, Dave Ross and James Horne. It has been extensively tested; in fact, if you bought “SINC-ARTIST HR” from Weymil Corp., you’ve already seen the spectacular displays that this system can give.
Before we get on with the details, here is a summary of the advantages of this remarkable software:
- 256×176 resolution, expandable to 256×206 (26 lines). ALL bits may be set/reset.
- A single POKE instantly reverses any of the 32 columns; a short machine-code routine instantly reverses the entire screen. Software-only video reverse!
- The high-res display file does NOT require stop bytes at the end of each display line, as does the standard Sinclair video or any of the other software-only hi-res packages. This considerably simplifies bit computations. Furthermore, you CANNOT crash the system by POKEing illegal codes into the display file.
- Easily adapted to fill entire screen (to 26 rows), or leave the bottom two rows available for standard video (allowing INPUT, report codes, and BASIC command or program line entry).
Suddenly, the door is open to all the projects we have so far only dreamed about; 40+ columns, “what you see is what you get” word processing, CAD, $100 “MAC-alikes,” and on and on.
The key to the system is a succinct 76-byte algorithm, presented in this article, which utilizes the built-in display and memory refresh facilities in a novel way. This routine creates the hi-res screen, which can be POKEd, scrolled, inverted or blanked out with all the ease of a true bit-mapped display.
Copyright Notice
Note that this article and the WRX16 HI-RES core routine are the copyrighted property of Wilf Rigter. Except for your own use, please do not reproduce it in any form without written permission. If you plan to use this core in software for sale or other distribution, contact the author for licensing arrangements. Write to Wilf Rigter, c/o D. Ross Educational Electronics, 208-206 East 6th, Vancouver BC Canada.
[I should add that Mr. Rigter and the ZED Team are presently polishing up other highly significant developments for the ZX81. Whether or not these will be released for publication in this magazine depends entirely on the integrity of our readers. ‘Nuff said? -fn]
Hardware Requirements
As stated, the hardware requirements for running WRX16-HR are minimal. Most of you already have what it takes. The CPU must be able to activate all 8 low address lines during the refresh cycle, instead of the conventional 7, and 8K of static RAM is required to store the hi-res display file.
Although most TS1000’s have been supplied with a suitable CPU, some of the ones we have encountered have not. Suitable CPU’s are, however, readily available at low cost. You’ll know that you need a different Z80A or Z80B if every eighth horizontal bit is missing.
The 8K static RAM is mapped in the 8-16K address space for simplicity and convenience. Note that this must be STATIC RAM; dynamic RAM (such as used by 64K RAM packs) will not work. This is because this hi-res system relies on being able to fetch the video data during refresh time. On dynamic RAMs this is not possible; you must therefore arrange for 8K of static RAM in the 8-16K region.
The NVM circuit published in the last issue of SWN will work with no changes whatever. So if you’ve put off building this, here’s a good reason to get out your soldering iron and go to it.
Another possibility is the ubiquitous “Hunter” NVM board. However, you will have to make a slight modification to make this work properly. The Hunter board uses the RD NOT signal to control the OE NOT pin of the CMOS RAM chips. As a result, the contents of RAM are gated onto the data bus only when RD NOT goes active low. However, during refresh time, the CPU holds RD NOT high, making it necessary to OR the RD NOT and RFSH NOT signals.
Such an OR circuit can consist of nothing more than a 1N4148 diode and a 4.7K resistor. Cut the trace connecting RD NOT (edge connector pin 16A) to the RAM pins 20. Bridge this gap with the 4.7K resistor. Connect the diode with its cathode towards RFSH NOT (edge connector pin 23A), and the anode to the RAM OE NOT pins (pin 20; the RAM end of the new resistor).
The only known software which is adversely affected by this modification is TS1500 HI*RES and packages (such as DUNGEON OF YMIR V1) which utilize this. If you plan to run this type of software, install a switch in series with the diode so that the modification can be switched out.
Also see the “Support” section of this article for information on static RAM parts kits, if you want to “roll your own” but don’t care to hassle with parts acquisition.
Finally, a functional equivalent to the “Hunter” board, with additional features, is being jointly developed by Larken Electronics and Silicon Mountain Computers. This will support both types of hi-res software with no changes. Stay tuned to SWN “For Your Support” for availability.
The only other hardware requirement is that the 48-64K region NOT be decoded. This precludes the use of 64K RAM packs, since this hi-res system relies on the 48-64K “echo” of the 16-32K region. It is conceivable that this restriction will be overcome, but at this writing a satisfactory fix has not been worked out.
And that’s it! Nothing more is required, except of course the all-important software. In fact, the principles of the system can be demonstrated with a completely stock, 2K TS1000, albeit with reduced display size, minimal user friendliness, and some fiddling with the software.
TS1500: These routines will only work on the TS1500 if a 16K RAM pack is installed in addition to the CMOS RAM. Why this is, is unclear at this writing.
The Core Routines
Once you have your hardware properly set up, enter the core routine. Start with a 1 REM statement, 128 bytes long. (Type 1 REM followed by 128 X’s or other character.) While you’re at it, enter a line 2 REM of 104 bytes, and a line 3 REM of 148 bytes, which we’ll fill later. Then enter the loader program of (lines 9000-9991 of Listing 4), and RUN 9000. Enter 16514 for “START” and 128 for “BYTES.” Now enter the decimal values of Table 1, or use an assembler or Hot Z to enter the hexcode / mnemonics of Listing 1.
TABLE 1: WRX16 CORE (DECIMAL)
-----------------------------
START? 16514 BYTES? 128
000:237:079:000:000:000:000:000:
000:000:000:000:000:000:000:000:
000:000:000:000:000:000:000:000:
000:000:000:000:000:000:000:000:
000:000:000:195:191:064:243:062:
007:071:000:016:253:198:238:060:
032:253:006:176:017:032:000:033:
000:032:195:198:064:000:000:005:
202:205:064:025:124:237:071:125:
195:131:192:042:012:064:042:012:
064:042:012:064:000:017:247:130:
025:062:030:237:071:062:245:001:
007:002:205:181:002:205:146:002:
205:032:002:221:033:168:064:195:
164:002:221:033:168:064:201:062:
030:237:071:221:033:129:002:201:LISTING 1: WRX16 CORE
4082 00 1REM°NOP
4083 ED4F DUMY LD R,A :Refresh Counter LSB
4085 00 NOP :Collapsed D_FILE
4086 00 NOP (32 locations)
4087 00 NOP Executed each
4088 00 NOP HLINE, controls
4089 00 NOP 32 columns.
408A 00 NOP NORM=00,
408B 00 NOP INVERT=80
408C 00 NOP
408D 00 NOP
408E 00 NOP
408F 00
...
NOP
409A 00 NOP
409B 00 NOP
409C 00 NOP
409D 00 NOP
409E 00 NOP
409F 00 NOP
40A0 00 NOP
40A1 00 NOP
40A2 00 NOP
40A3 00 NOP
40A4 00 NOP
40A5 C3BF40 JP DP-1 :Jump to Display Loop
40A8 F3 DPLY DI :PART 1: Disable Int.
40A9 3E07 LD A,07 :Horiz. sync delay to
40AB 47 LD B,A :Center screen
40AC 00 DP-0 NOP :(coarse)
40AD 10FD DJNZ DP-0
40AF C6EE ADD A,EE :(fine)
40B1 3C DP-A INC A
40B2 20FD JR NZ DP-A :Set HIRES scrn size
40B4 06B0 LD B,B0 :Horiz line length
40B6 112000 LD DE,0020 :HIRES screen location
40B9 210020 LD HL,2000 :Jump to display loop
40BC C3C640 JP DP-2 :PART 2
40BF 00 DP-1 NOP :Delay 8 T-states
40C0 00 NOP :Dec. line counter
40C1 05 DEC B :If finished, jump.
40C2 CACD40 JP Z DP-3 :Else calc. next line
40C5 19 ADD HL,DE :Load MSB of next
40C6 7C DP-2 LD A,H line start addr.
40C7 ED47 LD I,A :Get LSB ready
40C9 7D LD A,L :PART 3: Jump to ECHO
40CA C383C0 JP C083 :PART 4
40CD 2A0C40 DP-3°LD HL,(DFIL) :D_FILE pointer
40D0 2A0C40 LD HL,(DFIL) :Delay 36
40D3 2A0C40 LD HL,(DFIL) T-states
40D6 00 NOP
40D7 11F782 LD DE,82F7 :Last line offset
40DA 19 ADD HL,DE :Last line address
40DB 3E1E LD A,1E :Restore Sinc O/S
40DD ED47 LD I,A :font pointer
40DF 3EF5 LD A,F5 :Sinc O/S needs A=F5
40E1 010702 LD BC,0207 :1 row/8 high
40E4 CDB502 CALL 02B5 :Call ROM
40E7 CD9202 CALL 0292 :routines to display
40EA CD2002 CALL 0220 :the last rows
40ED DD21A840 LD IX,DPLY :Point back, then
40F1 C3A402 JP 02A4 :Jump to Sinc O/S
40F4 DD21A840 HRES LD IX,DPLY :Load JP vector
40F8 C9 RET :to HIRES routine
40F9 3E1E NRML LD A,1E :Load font table pntr.
40FB ED47 LD I,A :and set JP vector
40FD DD218102 LD IX,ZXIX :to point to SOS
4101 C9 RET :display routine.
4102 76 HALTTheory
This section is not essential reading if you only want to experiment with the WRX16 HI-RES core. However, we recommend that you do read it through at least once. Even if you don’t understand it all at first, you will probably pick up quite a bit of information about this unique type of hi-res specifically, and about “cheap video” in general.
Turn It On
Entry from the Sinclair Operating System (SOS) is made by first calling “HRES”, a short routine located at 40F4h. There, the IX register is loaded with a jump vector pointing to “DPLY”, the entry point located at 40A8h.
When the SOS next encounters the JP (IX) instruction, program control is transferred to the HIRES routine instead of the normal one residing in ROM. This occurs 60 times a second during the NMI service routine.
Main Loop
Part 1 of the Hi-Res routine initiates the main display loop. The maskable interrupt is disabled, the hi-res screen is centered, its vertical and horizontal size is set, and HL is loaded as a pointer to the start address of a 6K memory block reserved for the hi-res display file.
Parts 2 and 3 make up the main display loop. Timing is critical because the routine must trigger the ULA at precise intervals so that it, in turn, will produce line synchronization signals at appropriate intervals.
Part 2 keeps track of how many lines are left to do. If the display has been completed, a jump is made to Part 4, the Exit routine. Otherwise, the various registers are updated. The line start pointer is incremented by 32d, and the line count register is decremented by one. Finally, the start address of the next display line is loaded into the I and R registers.
In Part 3, a jump is made to the high-memory echo of a 32 character dummy display file, DUMY. There, the display facilities of the ULA are triggered and utilized as explained below. Refer to Mike Lord‘s “The Explorer’s Guide…” for background on how the ULA operates.
1: The ULA is triggered into the display mode whenever address line A15 is high during an instruction fetch cycle (M1). The HI-RES software achieves this by way of a jump vector pointing to ECHO, the high memory phantom of DUMY. This method is similar to the one used in the SOS display routine.
2: On being triggered, the hardware swings into action. It generates a line sync pulse, and pulls the data lines low on each M1 cycle. The microprocessor “sees” the 00h NOP code, so for 4 T-states does nothing except feed the R and I registers’ contents onto the address lines during the refresh cycle. It then increments the R register, and fetches the next dummy instruction. This process is repeated to the end of DUMY, where a jump instruction transfers control back to Part 2, completing the loop. This jump is made to its true address, so line A15 will no longer go high, temporarily suspending the ULA’s display activities. This process is repeated until all lines have been displayed.
3: When in the display mode, the ULA forces levels onto the address lines which normally address the font tables resident in ROM. Since the HI-RES screen is mapped elsewhere in memory, this action has no effect.
Instead, with the contents of the I and R registers applied to the address lines, memory locations in the HI-RES display file are accessed, and their contents applied to the data bus.
4: During the refresh cycle, the ULA loads these bytes into an internal register. From there there are sent serially to the modulator for display.
5: During the M1 cycle, the ULA monitors data line D7 and if high, inverts the video data. For a normal display, characters of the dummy display file are set to 00h. When set to 80h, they serve to invert the display column by column.
As mentioned above, Part 4 of the routine is to return to the SOS after completing some housekeeping chores.
S.O.S. Return
To restore the normal display facilities, “NRML” (a short routine located at 40F9h) is called to restore the IX register to point to the usual ROM-based SOS display routine. The I register is also restored so that it points to the proper font table base address in ROM.
Modifications
As shown, the core routine gives 176 HI-RES lines, leaving the bottom two rows (16 lines) open for the usual error reports and INPUT lines. To change the number of HI-RES lines to, say 192, change the command at 40B4h to LD B,C0. Note that this will still keep the two input lines at the bottom, for a total of 26 lines. This might cause some TV’s or monitors to spill off the top or bottom, and furthermore slows down machine operation slightly because of the additional lines displayed during the interrupt.
If you don’t need the standard-video input rows at the bottom, replace the CALL 02B5 at 40E4h with NOPs (00). In principle, you could increase the number of HI-RES lines to 206, with LD B,D0 at 40B4h.
Making these or other changes might mess up the timing enough to visibly displace the HI-RES screen. You can trim this with the commands at 40A9h (“coarse”) and 40AFh (“fine”).
Some Service Routines
Now that you have the core routine installed, how can you use it? In principle, at least, anything you could wish to do could be accomplished using BASIC. For example, to reverse a single column, POKE (16517+N),128 where N is the column 0-31. To restore it to normal, POKE it back to zero. Similarly, you can POKE anywhere in the HI-RES display file to fill any desired byte (row of 8 pixels) with the desired pattern.
Other operations however, such as clearing the screen, printing and plotting, would be painfully slow in BASIC. Such jobs require machine-code routines to be useful. Listing 2 shows a few rudimentary routines (by fn) to CLS, PLOT, UNPLOT and REVERSE. Use the loader (START=16648, BYTES=104) to enter the values of Table 2 into your 2 REM statement. To use PLOT or UNPLOT, first POKE 16438 with the desired X value (0-255) and 16439 with the Y value (0-176, or higher if the core was suitably modified.) Though this is a very “bare-bones” operating system, it is capable of neat displays, as Paul Bingham‘s “CRATER” program in Listing 4 demonstrates.
TABLE 2: SERVICE ROUTINES (DEC.)
--------------------------------
START? 16648 BYTES? 104
033:000:032:058:181:064:031:031:
031:071:014:000:054:000:011:084:
093:019:237:176:201:033:133:064:
001:032:000:126:198:128:119:024:
237:253:203:059:214:024:004:253:
203:059:150:237:075:054:064:058:
181:064:061:144:218:173:014:087:
089:203:058:203:027:203:058:203:
027:203:058:203:027:033:000:032:
025:086:121:230:007:060:001:000:
008:203:002:203:017:061:032:012:
253:203:059:086:040:004:203:193:
024:002:203:129:016:235:113:201:LISTING 2: SERVICE ROUTINES
4108 210020 CLS-°LD HL,2000 :Start of HR D_File
410B 3AB540 LD A,(40B5) :# of lines?
410E 1F RRA :Compute # of bytes
410F 1F RRA by mult. A
4110 1F RRA by 32,
4111 47 LD B,A and transfer
4112 0E00 LD C,00 to BC.
4114 3600 LD (HL),00 :Clear first byte
4116 0B DEC BC :One less to fill
4117 54 LD D,H :Tranfer
4118 5D LD E,L to DE
4119 13 INC DE :Next location
411A EDB0 LDIR :Fill entire D_File
411C C9 RET :then return.
411D 218540 RVRS LD HL,4085 :Start of dummy DF
4120 012000 LD BC,0020 :# of bytes
4123 7E LD A,(HL) :get first byte
4124 C680 ADD A,80 :complement bit 7
4126 77 LD (HL),A :and put it back
4127 18ED JR 4116 :then fill the rest.
4129 FDCB3BD6 PLOT SET 2,(CDFG) :Set flag for PLOT
412D 1804 JR PLT* :Go to PLT* routine
412F FDCB3B96 UNPL RES 2,(CDFG) :Set flag for UNPLOT
4133 ED4B3640 PLT* LD BC,(COOR) :Get coords. in BC
4137 3AB540 PLBC LD A,(40B5) :How many lines?
413A 3D DEC A :Max. vert. = 1 less
413B 90 SUB B :Invert vert. axis
413C DAAD0E JP C 0EAD :Overrange - error.
413F 57 GADR LD D,A :Get address, Y val. in D
4140 59 LD E,C :X val. in E
4141 CB3A SRL D :Then divide
4143 CB1B RR E :by 8
4145 CB3A SRL D to get
4147 CB1B RR E offset
4149 CB3A SRL D in DE
414B CB1B RR E
414D 210020 LD HL,2000 :get base address
4150 19 ADD HL,DE :and add offset.
4151 56 LD D,(HL) :Get byte at addr.
4152 79 LD A,C :Which bit? get X val.
4153 E607 AND 07 :reduce mod 8
4155 3C INC A :and increment
4156 010008 LD BC,0800 :B=8 bits, clear C
4159 CB02 BTLP RLC D :rotate byte
415B CB11 RL C :into C
415D 3D DEC A :Count down bit
415E 200C JR NZ NXBT :until desired bit reached.
4160 FDCB3B56 BIT 2,(CDFG) :Check flag
4164 2804 JR Z RSBT :for Plot/Unplot
4166 CBC1 STBT SET 0,C :Set the bit
4168 1802 JR NXBT :and keep rotating
416A CB81 RSBT RES 0,C :or reset bit
416C 10EB NXBT DJNZ BTLP :and keep rotating
416E 71 LD (HL),C :Replace modified byte
416F C9 RET :and return.The last routine (Listing 3) is a machine-code “Mandala” program to demonstrate the kind of speed that can be achieved using machine code PLOT and UNPLOT. Use the loader (START=16758, BYTES=148) to input the values of Table 3 into your 3 REM statement.
Finally, enter the rest of the BASIC DEMO lines of listing 4. Run the program. Briefly touching a key during the Mandala portion reverses the screen. Press BREAK to exit, then CONT to run the Crater portion. It pauses after every line so you can see how it’s progressing. Pretty neat, eh what?
LISTING 3: HI-RES MANDALA
4176 CDF440 °CALL HRES
4179 CD0841 CALL CLS-
417C CDBB02 CALL KEYN
417F 2C INC L
4180 C41D41 CALL NZ RVRS
4183 114B00 LD DE,004B
4186 ED4B3240 LD BC,(SEED)
418A 03 INC BC
418B 62 LD H,D
418C 68 LD L,B
418D CD0913 CALL 1309
4190 E5 PUSH HL
4191 62 LD H,D
4192 69 LD L,C
4193 CD0913 CALL 1309
4196 C1 POP BC
4197 7C LD A,H
4198 81 ADD A,C
4199 3001 JR NC 419C
419B 04 INC B
419C 67 LD H,A
419D 7D LD A,L
419E 90 SUB B
419F 3001 JR NC 41A2
41A1 25 DEC H
41A2 6F LD L,A
41A3 2B DEC HL
41A4 223240 LD (SEED),HL
41A7 CB3D SRL L
41A9 4D LD C,L
41AA 7C LD A,H
41AB 0655 LD B,55
41AD B8 CP B
41AE 3803 JR C 41B3
41B0 90 SUB B
41B1 18FA JR 41AD
41B3 47 LD B,A
41B4 FDCB3B56 BIT 2,(CDFG)
41B8 2806 JR Z 41C0
41BA FDCB3B96 RES 2,(CDFG)
41BE 1804 JR 41C4
41C0 FDCB3BD6 SET 2,(CDFG)
41C4 C5 PUSH BC
41C5 CDF641 CALL 41F6
41C8 CD0042 CALL 4200
41CB CD3741 CALL PLBC
41CE C1 POP BC
41CF C5 PUSH BC
41D0 CDF641 CALL 41F6
41D3 CD0542 CALL 4205
41D6 CD3741 CALL PLBC
41D9 C1 POP BC
41DA C5 PUSH BC
41DB CDFB41 CALL 41FB
41DE CD0042 CALL 4200
41E1 CD3741 CALL PLBC
41E4 C1 POP BC
41E5 CDFB41 °CALL 41FB
41E8 CD0542 CALL 4205
41EB CD3741 CALL PLBC
41EE CD460F CALL BREK
41F1 D2F940 JP NC NRML
41F4 1886 JR 417C
41F6 3E80 LD A,80
41F8 81 ADD A,C
41F9 4F LD C,A
41FA C9 RET
41FB 3E80 LD A,80
41FD 91 SUB C
41FE 18F9 JR 41F9
4200 3E58 LD A,58
4202 80 ADD A,B
4203 47 LD B,A
4204 C9 RET
4205 3E58 LD A,58
4207 90 SUB B
4208 18F9 JR 4203TABLE 3: HI-RES MANDALA (DEC.)
------------------------------
START? 16758 BYTES? 148
205:244:064:205:008:065:205:187:
002:044:196:029:065:017:075:000:
237:075:050:064:003:098:104:205:
009:019:229:098:105:205:009:019:
193:124:129:048:001:004:103:125:
144:048:001:037:111:043:034:050:
064:203:061:077:124:006:085:184:
056:003:144:024:250:071:253:203:
059:086:040:006:253:203:059:150:
024:004:253:203:059:214:197:205:
246:065:205:000:066:205:055:065:
193:197:205:246:065:205:005:066:
205:055:065:193:197:205:251:065:
205:000:066:205:055:065:193:205:
251:065:205:005:066:205:055:065:
205:070:015:210:249:064:024:134:
062:128:129:079:201:062:128:145:
024:249:062:088:128:071:201:062:
088:144:024:249:LISTING 4: WRX16 HI-RES DEMO
5 LET HR=16628
7 LET NRML=16633
10 LET CLS=16648
20 LET RVRS=16669
30 LET PLOT=16681
40 LET UNPL=16687
50 LET XP=16438
60 LET YP=16439
90 REM WRX16 HIRES MANDALA
95 SLOW
100 RAND USR 16758
190 REM CRATER BY PAUL BINGHAM
200 FAST
210 RAND USR CLS
215 IF PEEK 16517<>128 THEN RAND USR RVRS
220 LET Q=-4
230 FOR A=23 TO -16 STEP -1.6
240 IF A>5 THEN LET Q=Q-1.7
250 IF A<5 THEN LET Q=Q+1
260 FOR B=0 TO 15 STEP .2
270 LET Z=COS (.06*(A*A+B*B))
290 LET H=80-A*.9-B-Z
300 LET X=(124-600*((-A*.4+B*.9)/H))
310 IF X>255 OR X<0 THEN GOTO 370
320 LET Y=96+600*((-A*.3-B*.1+Z*.7)/H)
330 IF Y>175 OR Y<0 THEN GOTO 370
340 POKE XP,X
350 POKE YP,Y
360 RAND USR PLOT
370 NEXT B
380 GOSUB 500
385 FAST
390 NEXT A
400 GOSUB 500
410 IF INKEY$="" THEN GOTO 410
420 RAND USR NRML
430 STOP
500 SLOW
510 RAND USR HR
520 FOR N=1 TO 50
530 NEXT N
540 RETURN
9000 REM LOADER
9010 FAST
9020 CLS
9030 PRINT "START? ";
9040 INPUT ST
9050 PRINT ST,"BYTES? ";
9060 INPUT BY
9070 PRINT BY
9080 FOR N=ST TO ST+BY-1
9090 INPUT V
9100 POKE N,V
9110 PRINT (STR$ (V+1000))(2 TO );":";
9120 NEXT N
9990 SAVE "HRDEM▒"
9991 RUNSupport
Support for WRX16 HI-RES is available from D. Ross Educational Electronics, [see address in the “Copyright” section, or call (604) 874-1756]. The ZED Group and D.R.E.E. are preparing RESPAK 1 and RESPAK 2 starter-kits to make it easy for non-hackers to get going. Dave Ross has been involved with development from the start, and intends to stock the required kits, and later assembled units with additional refinements including bank-switched memory. Also contact D.R.E.E. if you develop interesting applications using this system.
Conclusion
We believe that the WRX16 HI-RES system removes the final obstacle to a more widespread acceptance of the TS1000. Dave, Jim Horne and myself are committed to developing this to the fullest, and will continue to work on user software and hardware enhancements. “In the wings” are at least one comprehensive Extended BASIC utility. Options will include easy plot, unplot and complement pixels; DRAW lines, circles, and other shapes; sprites; smooth (bit-wise) scrolling; upper/lower case, mixed text/graphics, and a form of windowing, to mention but a few possibilities. The goal is to provide a complete system that outperforms similar hardware-based schemes at a fraction of the price.
Acknowledgements also to Ray Lanoville for assistance in preparing this article from my field notes. Ray is interested in the educational potentials of the TS1000, and will be contributing to the team effort in that area.
Note: Type-in program listings on this website use ZMAKEBAS notation for graphics characters.